Many companies believe that using OCV/AOCV/POCV STA or even SSTA tools address their problems to handle variations. It is not true and each current design is actually at risk of failure after manufacturing. Also, most companies are using excessive margins for ~80% setup paths and ~60% hold paths with all resulting drawbacks. No doubt that AOCV & LOCV & POCV help to address some variation issues and are much better than OCV, but there are some critical issues that will lead to both optimism (risk) & pessimism depending on clocks location and design structure and cells used (see explanations at our webpage: Letter to Customer
Abelite has developed a cutting edge and break-through advanced methodology and tools for timing signoff. The tools are complementary to current Synopsys’s flow and PrimeTime STA as well as Cadence’s flow and Encounter ETS STA. Abelite will help their customers in the following 3 main areas:
- New timing tools that use pseudo-statistical and statistical post-processing of timing reports taking into account multiple sources of variation and correlations. The tools will catch possibly missed violations (from few to 20% paths with “bad” structures/properties), may reduce number of violations in range of 40-75% (hold) and 90-100% (setup), will reduce conservatism in setup and hold slack up to 200ps and 80ps respectively, and will report paths that may need to be analyzed at additional PVT/RC/Via corners.
- Justify and help to find the minimum number of PVT/RC/Via/Age-Degradation timing signoff corners that is in sync with used timing derates and match the required timing yield and risk of silicon failure.
- Find/Justify OCV and AOCV derates (margins including clock uncertainty) for users who still continue using OCV/AOCV derating flows. These derates will try to match the required timing yield and risk of silicon failure and take into account all sources of variations and tool/libraries inaccuracies, correlations, and used PVT/RC/Via signoff corners. All results are based on the unique Abelite’s variation modeling tool. We help to reduce your OCV/AOCV/LOCV and End-Point (EP) margins from two digits to one digit values. We have a proven track of our methodology success in this area. When Dr. Tetelbaum was working with LSI Corp., he developed initial and simplified methods and tools for enhancing OCV/AOCV timing signoff (namely, statistical modeling and justification of OCV/AOCV derates for commercial STA tools) that were successfully used since 2004 for multiple technology nodes (90nm, 65nm, 40nm, and 28nm) for different designs for LSI and such companies as Cisco Systems, Brocade, HP, Fujitsu, Eriksson, Oracle, Broadcom, Emulex, etc. The above timing methodology was completely based on Synopsys’ PrimeTime STA with OCV/AOCV derating capabilities and simplified statistical models for characterizing OCV and AOCV table derates. After a long study of variation sources and existing drawbacks of OCV/AOCV methodology, Dr. Tetelbaum has come to a conclusion that OCV/AOCV/POCV derating may be improved to some degree, but it cannot solve all the issues and brand new methods and tools are needed.
Since February of 2012, when Dr. Tetelbaum founded Abelite, he has developed new and much more powerful and sophisticated advanced timing signoff methodologies and tools in all 3 mentioned above areas. They are statistical by nature and separate all sources of variations and delay objects (like cells, wires, and vias), and can truly handle correlations between variation sources and objects. These new methodologies and paradigms for timing signoff and characterization of cell, wire, and via variations is a foundation for brand new prototypes and tools (currently under validation). The tools are complementary to STAs like PrimeTime and Encounter ETS and all these tools and methodologies are new (were never used or described previously), unique and not available from EDA industry or other semiconductor companies.
Abelite is a consulting company that is closely working with their customers to specify their needs, limitations and goals. Customers decide what additional characterization of technology, designs, EDA tools they will do, what data they will share, and what services they require from us. We will use customers’ data as well as our data, internal proprietary tools and Abelite analysis methodology to obtain answers to all customers’ requests. We do not require customers to change their EDA tools (it may be PrimeTime, Encounter ETS or other STA) and design flow. We help our customers to setup their inputs to the EDA tools to minimize Time-To-Market (TTM) , Turn Around Time (TAT), STA runtime, number of design iterations, number of STA runs, the risk of silicon failure, to avoid over-margining and fatal silicon failures, to have desired timing yield, and to obtain maximum design performance. Abelite is becoming the leader in timing signoff area and there are no other such services and tools we are aware of.
Past successful signoff with using not advanced STA and SSTA tools is no guarantee of future results & a risk of silicon failure is involved.
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