Consulting Services

Main objectives for these services are:

  • Consulting in advanced timing signoff for 10-28nm ASIC
  • Training in current (OCV, AOCV, POCV, LOCV, SOCV) & new statistical signoff methodologies
  • Teaching of how to analyze & mitigate variations impact during ASIC design

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Abelite consulting is critical for SoC because it is very important to properly handle multiple global & local variation sources, which impact timing accuracy & all design metrics, TAT, TTM & Cost, especially for advanced 28nm & below designs

Current STA/SSTA tools (Synopsys’ PrimeTime PT-SI & PT-VX & Cadence’s ETS/Tempus) use simplified timing derating methods & cannot accurately take into account all variations & correlations. These tools have multiple drawbacks:

  • May miss timing violations & cause silicon failure (timing derating optimism)
  • Over-margin & over-design  most paths due to timing derating conservatism & pessimism
  • Require numerous signoff corners that lead to a significant TAT & signoff deadlock
  • Diminish all design metrics (performance, timing yield, power & area) & economic factors (TTM, TAT, Costs, Customer reputation, etc.)
  • Do not support timing yield Y requirement and ECO fixes based on requested Y

Abelite Responsibilities:

  • Work with Customer on the Program & Dr. Tetelbaum (Abelite CEO & CTO) will be personally in charge of the program, collaboration, training & consulting
  • He will deliver 3 presentations/trainings (4 hours each) on the following topics:
    • (A): Current timing signoff methodologies & their drawbacks
    • (B): Advanced timing signoff methodologies
    • (C): Design tips to mitigate variations
  • He will train Customer Team & designers on how to better handle variations, minimize number of signoff corners, use proper timing derating and optionally new tools to get maximum accuracy of results
  • He will train, consult & work with Customer on their designs & characterization of variation sources
  • Dr. Tetelbaum will do everything possible to improve Customer design flow, design settings, timing signoff & tools, design metrics & costs, and avoid re-spins
  • Abelite Team will support all aspects of timing signoff

Consulting will include other important areas of design and signoff. Examples:

  • Margins (OCV, AOCV, POSV, LOCV, SOCV, EP)
    • Analysis and characterization of variation sources (together with customer):
      • Variation sources including EDA tool and libraries inaccuracies
      • Characterization of global & local variation sources
      • Statistical modeling of all variations and inaccuracies
      • Timing Yield analysis for new technology
    • Validation of OCV/AOCV/POCV/LOCV and End-Point (EP) margins for technology or design
    • Generation of AOCV derate tables or POCV coefficients based on the current OCV/EP and taking into account performance boost, under-/over-drive, Aging Degradation, partially correlated voltage domains, etc.
  • Statistical post-processing STA timing reports
  • Finding minimum number of PVT/RC/Via corners for signoff

 Optional Abelite Services/Activities: (During Program duration, Customer may decide to extend Program with the following optional & additional activity):

  • Evaluate & use new Abelite timing signoff methods & tools that offer solutions to contemporary signoff challenges:
    • Tools take into account all variation sources & correlations, separate cells, wires & vias, model Aging Degradation, DPT, FinFET, partially correlated voltage domains, dynamic crosstalk, etc.
  • Abelite will install all Abelite tools (AT-RITE, AT-TRUE, AT-STAT, and AT-STF) at the Customer location with unlimited number of licenses

 

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Past successful signoff without using advanced Abelite SSTA tools is no guarantee of future results & a risk of silicon failure is involved.
Copyright ©2013-2014 Abelite Design Automation, Inc. All Rights Reserved.

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